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Features
* * * * * * * *
32-kHz Oscillator 1.3 V to 1.8 V Operating-voltage Range 180 nA Typical Current Consumption Voltage Regulator Integrated Capacitors, Mask Selectable Mask Options for Pad Designation, Motor Period and Motor Pulse Width Low Resistance Outputs for Bipolar Stepping Motor Motor Fast-test Function
Description
The E1217X is an integrated circuit in CMOS silicon gate technology for analog watches. It consists of a 32-kHz oscillator, frequency dividers down to 1/64 Hz, output pulse formers and push-pull motor drivers. Integrated capacitors are provided (selectable mask option) for tuning of the crystal. Low current consumption and high oscillator stability are enabled by an on-chip voltage regulator.
32-kHz Standard Watch CMOS IC E1217X
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Pad Configuration
Figure 1. Pinning
1 8
2
7
E1217X
3 6
4
5
Chip size 1.06 mm 1.02 mm Pad size: 112 m 112 m Pad window: 100 m 100 m
Pin Description
Pin 1, 4 5, 6, 8 1 to 4 (7/5) or (7/6) 1 to 5, 8 1 to 5, 8 Symbol VSS VDD OSCIN/OSCOUT MOT 1/2 RESET TEST Function Negative supply voltage Positive supply voltage Oscillator input/output Motor drive outputs Reset input Test input/output
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E1217X
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E1217X
Functional Description
Voltage Regulator
An integrated voltage regulator provides the oscillator with a well-controlled negative supply voltage VREG. This improves the stability of the oscillator and keeps current consumption at a minimum. The oscillator inverter with feedback resistor generates the 32768 Hz clock frequency. A total capacitance of 24 pF is integrated. This can be selected for COSCOUT in 2 pF increments via a mask option. A 21-bit binary counter is provided, dividing the oscillator frequency down to 1/64 Hz. The leading six stages are connected to VDD and VREG, while the remaining 15 stages are connected to VDD and VSS. The E1217X contains two push-pull output buffers for driving bipolar stepping motors. During a motor pulse, the n-channel device of one buffer and the p-channel device of the other buffer are activated. The p-channel devices of both buffers are active (see Figure 3) between the two pulses. Cycle time and pulse width can be chosen via a metal mask option (Table 1).
Oscillator
Frequency Divider
Motor Drive Output
RESET
A debounced RESET input is provided. Connecting the RESET input to VDD resets the 12 low-order stages of the frequency divider, thus disabling further motor pulses. Motor pulses, which are in progress when the reset function is applied, will be completed. After releasing the RESET pad from VDD, the next motor pulse appears with a delay of one half motor cycle on the drive output opposed to the former (Figure 4). Due to the debounce circuitry on the RESET input, VDD must be applied for at least 31.2 ms. During RESET the input current is limited to 8 nA typically. A test frequency of 512 Hz is output to this pad which can be measured with a high resistance probe (R 10 MW, C 20 pF). This signal can be used for testing and tuning the oscillator. Connecting TEST to VDD for at least 4 ms changes the motor cycle time from the selected value to the test cycle time (mask options), while the motor pulse width remains unchanged (Figure 3). This feature can be used to reduce the amount of time required for testing the mechanical parts of the watch. Table 1. Motor Options
Motor-cycle Parameters Cycle time TM Motor pulse width tM Motor test cycle time TMT Value 2, 4, 6, 8, 10, 12, 20, 24, 30, 40, 60, 80, 120 s 0.98 to 14.65 ms in increments of 0.98 ms 250, 125, 62.5 ms
Test
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Absolute Maximum Ratings
Absolute maximum ratings define parameter limits which, if exceeded, may permanently change or damage the device. All inputs and outputs on Atmel's circuits are protected against electrostatic discharges. However, precautions to minimize the build-up of electrostatic charges during handling are recommended. The circuit is protected against supply-voltage reversal for typically 5 minutes.
Parameters Supply voltage Input voltage range, all inputs Output short-circuit duration Power dissipation (DIL package) Operating ambient temperature range Storage temperature range Lead temperature during soldering at 2 mm distance, 10 s Ptot Tamb Tstg Tsld Symbol VSS VIN Value -0.3 to +5 (VSS - 0.3 V) VIN (VDD + 0.3 V) indefinite 125 -20 to +70 -40 to +125 260 mW C C C Unit V V
Operating Characteristics
VDD = 0 V; VSS = -1.55 V; Tamb = +25C; CTR = 15 pF, unless otherwise specified. All voltage levels are measured with reference to VDD. Test crystal as specified below.
Parameters Operating voltage Operating current RESET input current Motor Outputs Motor output current Motor period Motor pulse width Motor test period Oscillator Stability Start-up voltage Integrated input capacitor Integrated output capacitor Note: COSCOUTmax = 24 pF 1. Typical parameters represent the statistical mean values. DVSS = 100 mV, CTR = 5 pF Startup within 2 s Df/f VST COSC IN COSC OUT -1.3 See Table 2 See Table 2 0.1 ppm V pF pF RL = 2 kW, VSS = -1.55 V IM TM TM TMT 0.7 See Table 2 See Table 2 See Table 2 mA s ms ms Test Conditions Functional test (Figure 2) Coscout = 16 pF, RL = R RESET = VDD Symbol VSS ISS IR Min. -1.3 -180 8 Typ.(1) Max. -1.8 -300 Unit V nA nA
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E1217X
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E1217X
Figure 2. Functional Test Circuit
VSS RESET
1
TEST
8
MOT1
2
7
E1217X
CTR OSCIN
RL MOT2 VDD
3 4
OSCOUT
6 5
Range of trimmer capacitance: CTR = 5 pF to 30 pF
Test Crystal Specification
Frequency Series resistance Static capacitance Dynamic capacitance Load capacitance
f = 32,768 Hz RS = 30 kW C0 = 1.5 pF C1 = 3 fF CL = 8 pF
Additional Notes
1. It is recommended to connect the quartz case to VDD (by conductive epoxy). 2. Capacitive coupling of TEST to OSCIN must be minimized by appropriate layout of the PCB to avoid disturbancing the oscillator.
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Figure 3. Motor Drive Outputs in Normal Mode and Motor Test
T < tTIN T > tTIN
TEST TM TMT
MOT1 tM tM
MOT2
TM/2
Figure 4. Motor Drive Outputs and RESET
T < tRIN T > tRIN
(open) RESET tM
MOT1 tM TM/2 tM
MOT2 TM
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E1217X
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E1217X
Ordering Information
Table 2. Option List E1217X
Motor Cycle (TM) s 2 2 10 2 2 40 2 2 2 Pulse (tM) ms 3.9 5.9 3.9 4.9 4.9 5.9 3.9 3.9 4.9 Test (TMT) ms 125 125 125 62.5 125 125 62.5 62.5 125 Integrated Capacitance(1) COSCIN pF 2 2 2 4 4 2 4 4 4 COSCOUT pF 14 14 14 14 14 14 14 14 14 Pad 1 VSS VSS VSS VSS OSCIN OSCIN OSCIN VSS VSS Pad 2 TEST TEST TEST TEST OSCOUT OSCOUT OSCOUT TEST TEST Pad 3 OSCIN OSCIN OSCIN OSCOUT RESET RESET RESET OSCOUT OSCIN Pad 4 OSCOUT OSCOUT OSCOUT OSCIN VSS VSS VSS OSCIN OSCOUT Pad 5 VDD VDD VDD VDD TEST TEST MOT2 VDD VDD Pad 6 MOT2 MOT2 MOT2 MOT2 MOT2 MOT2 VDD MOT2 MOT2 Pad 7 MOT1 MOT1 MOT1 MOT1 MOT1 MOT1 MOT1 MOT1 MOT1 Pad 8 RESET RESET RESET RESET VDD VDD TEST RESET RESET
Option -B -S -T -VA -VB -VC -VF -VH -WB
Note:
1. On-chip stray capacitance included
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